Table B.1 Operand Types for Tables B.2 and B.3
Operand Meaning
Gpr CPU general register Fpre Floating-point general register, even Cpr Coprocessor general register Imm2 Immediate value, power of 2 Imm16 16-bit immediate value Imm16r 16-bit immediate value relative to Gpr Imm32z 32-bit immediate value, lower 16 bits = 0 Imm32 32-bit immediate value Immfp Floating-point immediate value Tlabel Text (code) label, address in .text section Dlabel Data label, address in .data section Slabel Short data label, address in .sdata section, gp-relative
Table B.2 MIPS Instruction Quick Reference
Gpr Fpre Cpr Imm2 Imm16 Imm32z Imm32 Immfp Imm16r Imm32zr Imm32r Tlabel Slabel Dlabel
abs t0,X 3 - - - - - - - - - - - - - abs.d $f4,X - 1 - - - - - - - - - - - - abs.s $f4,X - 1 - - - - - - - - - - - - add t0,t1,X 1 - - 1 1 2* 3* - - - - - - - add.d $f4,$f6,X - 1 - - - - - - - - - - - - add.s $f4,$f6,X - 1 - - - - - - - - - - - - addu t0,t1,X 1 - - 1 1 2* 3* - - - - - - - and t0,t1,X 1 - - 1 1 2* 3* - - - - - - - b X - - - - - - - - - - - 1-2 - 1-2 bal X - - - - - - - - - - - 1-2 - 1-2 bc0f X - - - - - - - - - - - 1-2 - 1-2 bc0t X - - - - - - - - - - - 1-2 - 1-2 beq t0,X,main 1-2 - - 2-3* 2-3* 2-3* 3-4* - - - - - - - beqz t0,X - - - - - - - - - - - 1-2 - 1-2 bge t0,X,main 2-3* - - 2-3* 2-3* 3-4* 4-5* - - - - - - - bgeu t0,X,main 2-3* - - 2-3* 2-3* 3-4* 4-5* - - - - - - - bgez t0,X - - - - - - - - - - - 1-2 - 1-2 bgezal t0,X - - - - - - - - - - - 1-2 - 1-2 bgt t0,X,main 2-3* - - 2-3* 2-3* 4-5* 4-5* - - - - - - - bgtu t0,X,main 2-3* - - 2-3* 2-3* 4-5* 4-5* - - - - - - - bgtz t0,X - - - - - - - - - - - 1-2 - 1-2 ble t0,X,main 2-3* - - 2-3* 2-3* 4-5* 4-5* - - - - - - - bleu t0,X,main 2-3* - - 2-3* 2-3* 4-5* 4-5* - - - - - - - blez t0,X - - - - - - - - - - - 1-2 - 1-2 blt t0,X,main 2-3* - - 2-3* 2-3* 3-4* 4-5* - - - - - - - bltu t0,X,main 2-3* - - 2-3* 2-3* 3-4* 4-5* - - - - - - - bltz t0,X - - - - - - - - - - - 1-2 - 1-2 bltzal t0,X - - - - - - - - - - - 1-2 - 1-2 bne t0,X,main 1-2 - - 2-3* 2-3* 2-3* 3-4* - - - - - - - bnez t0,X - - - - - - - - - - - 1-2 - 1-2 break X - - - 1 - - - - - - - - - - c.cond.d $f4,X - 1-2 - - - - - - - - - - - - ceil.w.d $f4,$f6,X 7-11* - - - - - - - - - - - - - ceil.w.s $f4,$f6,X 7-11* - - - - - - - - - - - - - ceil.w.s $f4,$f6,X 7-11* - - - - - - - - - - - - - ceilu.w.d $f4,$f6,X 7-11* - - - - - - - - - - - - - cfc1 t0,X - - 2-3 - - - - - - - - - - - ctc1 t0,X - - 1-3 - - - - - - - - - - - cvt.d.s $f4,X - 1 - - - - - - - - - - - - cvt.d.w $f4,X - 1 - - - - - - - - - - - - cvt.s.d $f4,X - 1 - - - - - - - - - - - - cvt.s.w $f4,X - 1 - - - - - - - - - - - - cvt.w.d $f4,X - 1 - - - - - - - - - - - - cvt.w.s $f4,X - 1 - - - - - - - - - - - - div t0,t1,X 9-11* - - 4* 3-5* 3-5* 4-6* - - - - - - - div zero,t0,X 1 - - 4* 2* 2* 3* - - - - - - - div.d $f4,$f6,X - 1-2 - - - - - - - - - - - - div.s $f4,$f6,X - 1-2 - - - - - - - - - - - - divu t0,t1,X 4-5 - - 1 3-5* 3-5* 4-6* - - - - - - - divu zero,t0,X 1 - - 1 2* 2* 3* - - - - - - - floor.w.d $f4,$f6,X 7-11* - - - - - - - - - - - - - floor.w.s $f4,$f6,X 7-11* - - - - - - - - - - - - - flooru.w.d $f4,$f6,X 7-11* - - - - - - - - - - - - - flooru.w.s $f4,$f6,X 7-11* - - - - - - - - - - - - - j X 1-2 - - 1-2 1-2 - - - - - - 1-2 1-2 1-2 jal X 1-2 - - 1-2 1-2 - - - - - - 1-2 1-2 1-2 l.d $f4,X - - - 2-3 2-3 3-4* 3-4* - 2-3 4-5* 4-5* 3-4* 2-3 3-4* l.s $f4,X - - - 1-2 1-2 2-3* 2-3* - 1-2 3-4* 3-4* 2-3* 1-2 2-3* la t0,X - - - 1 1 2 2 - 1 3 3 2 1 2 lb t0,X - - - 1-2 1-2 2-3 2-3 - 1-2 3-4 3-4 2-3 1-2 2-3 lbu t0,X - - - 1-2 1-2 2-3 2-3 - 1-2 3-4 3-4 2-3 1-2 2-3 ld t0,X - - - 2-3 2-3 3-4* 3-4* - 2-3 4-5* 4-5* 3-4* 2-3 3-4* lh t0,X - - - 1-2 1-2 2-3 2-3 - 1-2 3-4 3-4 2-3 1-2 2-3 lhu t0,X - - - 1-2 1-2 2-3 2-3 - 1-2 3-4 3-4 2-3 1-2 2-3 li t0,X - - - 1 1 1 2 - - - - - - - li.d $f4,X - - - - - - - 2-3 - - - - - - li.s $f4,X - - - - - - - 1-2 - - - - - - lui t0,X - - - 1 1 - - - - - - - - - lw t0,X - - - 1-2 1-2 2-3 2-3 - 1-2 3-4 3-4 2-3 1-2 2-3 lwc1 $f4,X - - - 1-2 1-2 2-3* 2-3* - 1-2 3-4* 3-4* 2-3* 1-2 2-3* lwl t0,X - - - 1-2 1-2 2-3* 2-3* - 1-2 3-4* 3-4* 2-3* 1-2 2-3* lwr t0,X - - - 1-2 1-2 2-3* 2-3* - 1-2 3-4* 3-4* 2-3* 1-2 2-3* mfc0 t0,X - - 1 - - - - - - - - - - - mfhi X 1-3 - - - - - - - - - - - - - mflo X 1-3 - - - - - - - - - - - - - mov.d $f4,X - 1 - - - - - - - - - - - - mov.s $f4,X - 1 - - - - - - - - - - - - move t0,X 1 - - - - - - - - - - - - - mtc0 t0,X - - 1 - - - - - - - - - - - mthi X 1 - - - - - - - - - - - - - mtlo X 1 - - - - - - - - - - - - - mul t0,t1,X 2-4 - - 1 9 9 4-6* - - - - - - - mul.d $f4,$f6,X - 1 - - - - - - - - - - - - mul.s $f4,$f6,X - 1 - - - - - - - - - - - - mulo t0,t1,X 7-10* - - 2 16 8-11* 9-12* - - - - - - - mulou t0,t1,X 5-6* - - 6-7* 6-7* 6-7* 7-8* - - - - - - - mult t0,X 1 - - - - - - - - - - - - - multu t0,X 1 - - - - - - - - - - - - - neg t0,X 1 - - - - - - - - - - - - - neg.d $f4,X - 1 - - - - - - - - - - - - neg.s $f4,X - 1 - - - - - - - - - - - - negu t0,X 1 - - - - - - - - - - - - - nor t0,t1,X 1 - - 2 2 2* 3* - - - - - - - not t0,X 1 - - - - - - - - - - - - - or t0,t1,X 1 - - 1 1 2* 3* - - - - - - - rem t0,t1,X 9-11* - - 4-5 3-5* 3-5* 4-6* - - - - - - - remu t0,t1,X 4-5 - - 1 3-5* 3-5* 4-6* - - - - - - - rfe - - - - - - - - - - - - - - rol t0,t1,X 4* - - 3* - - - - - - - - - - ror t0,t1,X 4* - - 3* - - - - - - - - - - round.w.d $f4,$f6,X 7-10* - - - - - - - - - - - - - round.w.s $f4,$f6,X 7-10* - - - - - - - - - - - - - roundu.w.d $f4,$f6,X 7-10* - - - - - - - - - - - - - roundu.w.s $f4,$f6,X 7-10* - - - - - - - - - - - - - s.d $f4,X - - - 2 2 3* 3* - 2 4* 4* 3* 2 3* s.s $f4,X - - - 1 1 2* 2* - 1 3* 3* 2* 1 2* sb t0,X - - - 1 1 2* 2* - 1 3* 3* 2* 1 2* sd t0,X - - - 2 2 3* 3* - 2 4* 4* 3* 2 3* seq t0,t1,X 2 - - 2 2 3* 4* - - - - - - - sge t0,t1,X 2 - - 2 2 3* 4* - - - - - - - sgeu t0,t1,X 2 - - 2 2 3* 4* - - - - - - - sgt t0,t1,X 1 - - 2* 2* 2* 3* - - - - - - - sgtu t0,t1,X 1 - - 2* 2* 2* 3* - - - - - - - sh t0,X - - - 1 1 2* 2* - 1 3* 3* 2* 1 2* sle t0,t1,X 2 - - 1 1 3* 3* - - - - - - - sleu t0,t1,X 2 - - 1 1 3* 3* - - - - - - - sll t0,t1,X 1 - - 1 - - - - - - - - - - slt t0,t1,X 1 - - 1 1 2* 3* - - - - - - - sltu t0,t1,X 1 - - 1 1 2* 3* - - - - - - - sne t0,t1,X 2 - - 2 2 3* 4* - - - - - - - sra t0,t1,X 1 - - 1 - - - - - - - - - - srl t0,t1,X 1 - - 1 - - - - - - - - - - sub t0,t1,X 1 - - 1 1 2* 3* - - - - - - - sub.d $f4,$f6,X - 1 - - - - - - - - - - - - sub.s $f4,$f6,X - 1 - - - - - - - - - - - - subu t0,t1,X 1 - - 1 1 2* 3* - - - - - - - sw t0,X - - - 1 1 2* 2* - 1 3* 3* 2* 1 2* swc1 $f4,X - - - 1 1 2* 2* - 1 3* 3* 2* 1 2* swl t0,X - - - 1 1 2* 2* - 1 3* 3* 2* 1 2* swr t0,X - - - 1 1 2* 2* - 1 3* 3* 2* 1 2* syscall - - - - - - - - - - - - - - teq t0,X 2-3 - - 3-4* 3-4* 3-4* 4-5* - - - - - - - tge t0,X 3-4* - - 3-4* 3-4* 4-5* 5-6* - - - - - - - tgeu t0,X 3-4* - - 3-4* 3-4* 4-5* 5-6* - - - - - - - tlt t0,X 3-4* - - 3-4* 3-4* 4-5* 5-6* - - - - - - - tltu t0,X 3-4* - - 3-4* 3-4* 4-5* 5-6* - - - - - - - tne t0,X 2-3 - - 3-4* 3-4* 3-4* 4-5* - - - - - - - trunc.w.d $f4,$f6,X 7-11* - - - - - - - - - - - - - trunc.w.s $f4,$f6,X 7-11* - - - - - - - - - - - - - truncu.w.d $f4,$f6,X 7-11* - - - - - - - - - - - - - truncu.w.s $f4,$f6,X 7-11* - - - - - - - - - - - - - ulh t0,X - - - 4* 4* 6* 6* - 4* 7* 7* 6* 4* 6* ulhu t0,X - - - 4* 4* 6* 6* - 4* 7* 7* 6* 4* 6* ulw t0,X - - - 2-3 2-3 4* 4* - 2-3 5* 5* 4-5* 2-3 4-5* ush t0,X - - - 3* 3* 8* 8* - 3* 9* 9* 8* 3* 8* usw t0,X - - - 2 2 4* 4* - 2 5* 5* 4* 2 4* xor t0,t1,X 1 - - 1 1 2* 3* - - - - - - -
Table B.3 MIPS Instruction Quick-Reference by Type
Arithmetic Gpr Imm2 Imm16 Imm32z Imm32
add t0,t1,X 1 1 1 2* 3* addu t0,t1,X 1 1 1 2* 3* sub t0,t1,X 1 1 1 2* 3* subu t0,t1,X 1 1 1 2* 3* mul t0,t1,X 2-4 1 9 9 4-6* mulo t0,t1,X 7-10* 2 16 8-11* 9-12* mulou t0,t1,X 5-6* 7* 6-7* 6-7* 7-8* mult t0,X 1 - - - - multu t0,X 1 - - - - div t0,t1,X 9-11* 4* 3-5* 3-5* 4-6* div zero,t0,X 1 4* 2* 2* 3* divu t0,t1,X 4-5 1 3-5* 3-5* 4-6* divu zero,t0,X 1 1 2* 2* 3* rem t0,t1,X 9-11* 5 3-5* 3-5* 4-6* remu t0,t1,X 4-5 1 3-5* 3-5* 4-6* abs t0,X 3 - - - - neg t0,X 1 - - - - negu t0,X 1 - - - -
Logical
and t0,t1,X 1 1 1 2* 3* nor t0,t1,X 1 2 2 2* 3* not t0,X 1 - - - - or t0,t1,X 1 1 1 2* 3* xor t0,t1,X 1 1 1 2* 3*
Rotates and Shifts
rol t0,t1,X 4* 3* - - - ror t0,t1,X 4* 3* - - - sll t0,t1,X 1 1 - - - sra t0,t1,X 1 1 - - - srl t0,t1,X 1 1 - - -
Data Movement (between registers)
mfhi X 1-3 - - - - mflo X 1-3 - - - - move t0,X 1 - - - - mthi X 1 - - - - mtlo X 1 - - - -
Set register on Condition Gpr Imm2 Imm16 Imm32z Imm32
seq t0,t1,X 2 2 2 3* 4* sge t0,t1,X 2 2 2 3* 4* sgeu t0,t1,X 2 2 2 3* 4* sgt t0,t1,X 1 2* 2* 2* 3* sgtu t0,t1,X 1 2* 2* 2* 3* sle t0,t1,X 2 1 1 3* 3* sleu t0,t1,X 2 1 1 3* 3* slt t0,t1,X 1 1 1 2* 3* sltu t0,t1,X 1 1 1 2* 3* sne t0,t1,X 2 2 2 3* 4*
Trap on Condition
teq t0,X 2-3 3-4* 3-4* 3-4* 4-5* tge t0,X 3-4* 3-4* 3-4* 4-5* 5-6* tgeu t0,X 3-4* 3-4* 3-4* 4-5* 5-6* tlt t0,X 3-4* 3-4* 3-4* 4-5* 5-6* tltu t0,X 3-4* 3-4* 3-4* 4-5* 5-6* tne t0,X 2-3 3-4* 3-4* 3-4* 4-5*
Branches and Jumps Gpr Imm2 Imm16 Imm32z Imm32 TDlabel Slabel
b X - - - - - 1-2 - j X 1-2 2 1-2 - - 1-2 1-2 beqz t0,X - - - - - 1-2 - bgez t0,X - - - - - 1-2 - bgtz t0,X - - - - - 1-2 - blez t0,X - - - - - 1-2 - bltz t0,X - - - - - 1-2 - bnez t0,X - - - - - 1-2 - beq t0,X,main 1-2 3* 2-3* 2-3* 3-4* - - bge t0,X,main 2-3* 3* 2-3* 3-4* 4-5* - - bgeu t0,X,main 2-3* 3* 2-3* 3-4* 4-5* - - bgt t0,X,main 2-3* 3* 2-3* 4-5* 4-5* - - bgtu t0,X,main 2-3* 3* 2-3* 4-5* 4-5* - - ble t0,X,main 2-3* 3* 2-3* 4-5* 4-5* - - bleu t0,X,main 2-3* 3* 2-3* 4-5* 4-5* - - blt t0,X,main 2-3* 3* 2-3* 3-4* 4-5* - - bltu t0,X,main 2-3* 3* 2-3* 3-4* 4-5* - - bne t0,X,main 1-2 3* 2-3* 2-3* 3-4* - -
Subroutine Calls
bal X - - - - - 1-2 - bgezal t0,X - - - - - 1-2 - bltzal t0,X - - - - - 1-2 - jal X 1-2 2 1-2 - - 1-2 1-2
Loads and Stores Imm2-16 Imm32 Imm16r Imm32zr Imm32r TDlabel Slabel
lb t0,X 1-2 2-3 1-2 3-4 3-4 2-3 1-2 lbu t0,X 1-2 2-3 1-2 3-4 3-4 2-3 1-2 lh t0,X 1-2 2-3 1-2 3-4 3-4 2-3 1-2 lhu t0,X 1-2 2-3 1-2 3-4 3-4 2-3 1-2 lw t0,X 1-2 2-3 1-2 3-4 3-4 2-3 1-2 ld t0,X 2-3 3-4* 2-3 4-5* 4-5* 3-4* 2-3 lwl t0,X 1-2 2-3* 1-2 3-4* 3-4* 2-3* 1-2 lwr t0,X 1-2 2-3* 1-2 3-4* 3-4* 2-3* 1-2 sb t0,X 1 2* 1 3* 3* 2* 1 sh t0,X 1 2* 1 3* 3* 2* 1 sw t0,X 1 2* 1 3* 3* 2* 1 sd t0,X 2 3* 2 4* 4* 3* 2 swl t0,X 1 2* 1 3* 3* 2* 1 swr t0,X 1 2* 1 3* 3* 2* 1
Unaligned Loads and Stores
ulh t0,X 4* 6* 4* 7* 7* 6* 4* ulhu t0,X 4* 6* 4* 7* 7* 6* 4* ulw t0,X 2-3 4* 2-3 5* 5* 4-5* 2-3 ush t0,X 3* 8* 3* 9* 9* 8* 3* usw t0,X 2 4* 2 5* 5* 4* 2
Coprocessor Zero Cpr TDlabel
bc0f X - 1-2 bc0t X - 1-2 mfc0 t0,X 1 - mtc0 t0,X 1 - rfe - -
Coprocessor 1 Arithmetic Gpr Fpre
abs.d $f4,X - 1 abs.s $f4,X - 1 add.d $f4,$f6,X - 1 add.s $f4,$f6,X - 1 ceil.w.d $f4,$f6,X 7-11* - ceil.w.s $f4,$f6,X 7-11* - ceil.w.s $f4,$f6,X 7-11* - ceilu.w.d $f4,$f6,X 7-11* - cvt.d.s $f4,X - 1 cvt.d.w $f4,X - 1 cvt.s.d $f4,X - 1 cvt.s.w $f4,X - 1 cvt.w.d $f4,X - 1 cvt.w.s $f4,X - 1 div.d $f4,$f6,X - 1-2 div.s $f4,$f6,X - 1-2 floor.w.d $f4,$f6,X 7-11* - floor.w.s $f4,$f6,X 7-11* - flooru.w.d $f4,$f6,X 7-11* - flooru.w.s $f4,$f6,X 7-11* - mul.d $f4,$f6,X - 1 mul.s $f4,$f6,X - 1 neg.d $f4,X - 1 neg.s $f4,X - 1 round.w.d $f4,$f6,X 7-10* - round.w.s $f4,$f6,X 7-10* - roundu.w.d $f4,$f6,X 7-10* - roundu.w.s $f4,$f6,X 7-10* - trunc.w.d $f4,$f6,X 7-11* - trunc.w.s $f4,$f6,X 7-11* - truncu.w.d $f4,$f6,X 7-11* - truncu.w.s $f4,$f6,X 7-11* - sub.d $f4,$f6,X - 1 sub.s $f4,$f6,X - 1 Fpre Cpr Immfp TDlabel bc1f X - - - 1-2 bc1t X - - - 1-2 c.cond.d $f4,X 1-2 - - - cfc1 t0,X - 2-3 - - ctc1 t0,X - 1-3 - - li.d $f4,X - - 2-3 - li.s $f4,X - - 1-2 - mov.d $f4,X 1 - - - mov.s $f4,X 1 - - -
Coprocessor 1 Loads and Stores Imm2-16 Imm322 Imm16r Imm32r TDlabel Slabel
l.d $f4,X 2-3 3-4* 2-3 4-5* 3-4* 2-3 l.s $f4,X 1-2 2-3* 1-2 3-4* 2-3* 1-2 lwc1 $f4,X 1-2 2-3* 1-2 3-4* 2-3* 1-2 s.d $f4,X 2 3* 2 4* 3* 2 s.s $f4,X 1 2* 1 3* 2* 1 swc1 $f4,X 1 2* 1 3* 2* 1
Miscellaneous Imm2 Imm16 Imm32z Imm32 Imm32r TDlabel Slabel
break X 1 - - - - - - la t0,X 1 1 2 2 3 2 1 li t0,X 1 1 1 2 - - - lui t0,X 1 1 - - - - - syscall - - - - - - -